set_property SRC_FILE_INFO {cfile:d:/FPGA_Proj/system_test/system_test.gen/sources_1/bd/system/ip/system_processing_system7_0_0/system_processing_system7_0_0.xdc rfile:../../../system_test.gen/sources_1/bd/system/ip/system_processing_system7_0_0/system_processing_system7_0_0.xdc id:1 order:EARLY scoped_inst:inst} [current_design]
current_instance inst
set_property src_info {type:SCOPED_XDC file:1 line:28 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C8" [get_ports "MIO[15]"]
set_property src_info {type:SCOPED_XDC file:1 line:35 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C5" [get_ports "MIO[14]"]
set_property src_info {type:SCOPED_XDC file:1 line:41 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "H5" [get_ports "DDR_VRP"]
set_property src_info {type:SCOPED_XDC file:1 line:45 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "G5" [get_ports "DDR_VRN"]
set_property src_info {type:SCOPED_XDC file:1 line:49 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "M5" [get_ports "DDR_WEB"]
set_property src_info {type:SCOPED_XDC file:1 line:53 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "P4" [get_ports "DDR_RAS_n"]
set_property src_info {type:SCOPED_XDC file:1 line:57 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "N5" [get_ports "DDR_ODT"]
set_property src_info {type:SCOPED_XDC file:1 line:61 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "B4" [get_ports "DDR_DRSTB"]
set_property src_info {type:SCOPED_XDC file:1 line:65 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "W5" [get_ports "DDR_DQS[3]"]
set_property src_info {type:SCOPED_XDC file:1 line:70 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "R2" [get_ports "DDR_DQS[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:75 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "G2" [get_ports "DDR_DQS[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:79 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C2" [get_ports "DDR_DQS[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:83 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "W4" [get_ports "DDR_DQS_n[3]"]
set_property src_info {type:SCOPED_XDC file:1 line:88 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "T2" [get_ports "DDR_DQS_n[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:93 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "F2" [get_ports "DDR_DQS_n[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:97 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "B2" [get_ports "DDR_DQS_n[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:101 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "E3" [get_ports "DDR_DQ[9]"]
set_property src_info {type:SCOPED_XDC file:1 line:105 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "E2" [get_ports "DDR_DQ[8]"]
set_property src_info {type:SCOPED_XDC file:1 line:109 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "E1" [get_ports "DDR_DQ[7]"]
set_property src_info {type:SCOPED_XDC file:1 line:113 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C1" [get_ports "DDR_DQ[6]"]
set_property src_info {type:SCOPED_XDC file:1 line:117 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "D1" [get_ports "DDR_DQ[5]"]
set_property src_info {type:SCOPED_XDC file:1 line:121 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "D3" [get_ports "DDR_DQ[4]"]
set_property src_info {type:SCOPED_XDC file:1 line:125 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "A4" [get_ports "DDR_DQ[3]"]
set_property src_info {type:SCOPED_XDC file:1 line:129 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "V3" [get_ports "DDR_DQ[31]"]
set_property src_info {type:SCOPED_XDC file:1 line:134 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "V2" [get_ports "DDR_DQ[30]"]
set_property src_info {type:SCOPED_XDC file:1 line:139 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "A2" [get_ports "DDR_DQ[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:143 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "W3" [get_ports "DDR_DQ[29]"]
set_property src_info {type:SCOPED_XDC file:1 line:148 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "Y2" [get_ports "DDR_DQ[28]"]
set_property src_info {type:SCOPED_XDC file:1 line:153 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "Y4" [get_ports "DDR_DQ[27]"]
set_property src_info {type:SCOPED_XDC file:1 line:158 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "W1" [get_ports "DDR_DQ[26]"]
set_property src_info {type:SCOPED_XDC file:1 line:163 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "Y3" [get_ports "DDR_DQ[25]"]
set_property src_info {type:SCOPED_XDC file:1 line:168 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "V1" [get_ports "DDR_DQ[24]"]
set_property src_info {type:SCOPED_XDC file:1 line:173 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "U3" [get_ports "DDR_DQ[23]"]
set_property src_info {type:SCOPED_XDC file:1 line:178 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "U2" [get_ports "DDR_DQ[22]"]
set_property src_info {type:SCOPED_XDC file:1 line:183 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "U4" [get_ports "DDR_DQ[21]"]
set_property src_info {type:SCOPED_XDC file:1 line:188 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "T4" [get_ports "DDR_DQ[20]"]
set_property src_info {type:SCOPED_XDC file:1 line:193 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "B3" [get_ports "DDR_DQ[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:197 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "R1" [get_ports "DDR_DQ[19]"]
set_property src_info {type:SCOPED_XDC file:1 line:202 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "R3" [get_ports "DDR_DQ[18]"]
set_property src_info {type:SCOPED_XDC file:1 line:207 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "P3" [get_ports "DDR_DQ[17]"]
set_property src_info {type:SCOPED_XDC file:1 line:212 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "P1" [get_ports "DDR_DQ[16]"]
set_property src_info {type:SCOPED_XDC file:1 line:217 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "J1" [get_ports "DDR_DQ[15]"]
set_property src_info {type:SCOPED_XDC file:1 line:221 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "H1" [get_ports "DDR_DQ[14]"]
set_property src_info {type:SCOPED_XDC file:1 line:225 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "H2" [get_ports "DDR_DQ[13]"]
set_property src_info {type:SCOPED_XDC file:1 line:229 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "J3" [get_ports "DDR_DQ[12]"]
set_property src_info {type:SCOPED_XDC file:1 line:233 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "H3" [get_ports "DDR_DQ[11]"]
set_property src_info {type:SCOPED_XDC file:1 line:237 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "G3" [get_ports "DDR_DQ[10]"]
set_property src_info {type:SCOPED_XDC file:1 line:241 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C3" [get_ports "DDR_DQ[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:245 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "Y1" [get_ports "DDR_DM[3]"]
set_property src_info {type:SCOPED_XDC file:1 line:250 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "T1" [get_ports "DDR_DM[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:255 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "F1" [get_ports "DDR_DM[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:259 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "A1" [get_ports "DDR_DM[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:263 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "N1" [get_ports "DDR_CS_n"]
set_property src_info {type:SCOPED_XDC file:1 line:267 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "N3" [get_ports "DDR_CKE"]
set_property src_info {type:SCOPED_XDC file:1 line:271 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "L2" [get_ports "DDR_Clk"]
set_property src_info {type:SCOPED_XDC file:1 line:275 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "M2" [get_ports "DDR_Clk_n"]
set_property src_info {type:SCOPED_XDC file:1 line:279 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "P5" [get_ports "DDR_CAS_n"]
set_property src_info {type:SCOPED_XDC file:1 line:283 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "J5" [get_ports "DDR_BankAddr[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:287 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "R4" [get_ports "DDR_BankAddr[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:291 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "L5" [get_ports "DDR_BankAddr[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:295 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "J4" [get_ports "DDR_Addr[9]"]
set_property src_info {type:SCOPED_XDC file:1 line:299 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "K1" [get_ports "DDR_Addr[8]"]
set_property src_info {type:SCOPED_XDC file:1 line:303 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "K4" [get_ports "DDR_Addr[7]"]
set_property src_info {type:SCOPED_XDC file:1 line:307 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "L4" [get_ports "DDR_Addr[6]"]
set_property src_info {type:SCOPED_XDC file:1 line:311 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "L1" [get_ports "DDR_Addr[5]"]
set_property src_info {type:SCOPED_XDC file:1 line:315 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "M4" [get_ports "DDR_Addr[4]"]
set_property src_info {type:SCOPED_XDC file:1 line:319 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "K3" [get_ports "DDR_Addr[3]"]
set_property src_info {type:SCOPED_XDC file:1 line:323 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "M3" [get_ports "DDR_Addr[2]"]
set_property src_info {type:SCOPED_XDC file:1 line:327 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "K2" [get_ports "DDR_Addr[1]"]
set_property src_info {type:SCOPED_XDC file:1 line:331 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "F4" [get_ports "DDR_Addr[14]"]
set_property src_info {type:SCOPED_XDC file:1 line:335 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "D4" [get_ports "DDR_Addr[13]"]
set_property src_info {type:SCOPED_XDC file:1 line:339 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "E4" [get_ports "DDR_Addr[12]"]
set_property src_info {type:SCOPED_XDC file:1 line:343 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "G4" [get_ports "DDR_Addr[11]"]
set_property src_info {type:SCOPED_XDC file:1 line:347 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "F5" [get_ports "DDR_Addr[10]"]
set_property src_info {type:SCOPED_XDC file:1 line:351 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "N2" [get_ports "DDR_Addr[0]"]
set_property src_info {type:SCOPED_XDC file:1 line:355 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "C7" [get_ports "PS_PORB"]
set_property src_info {type:SCOPED_XDC file:1 line:358 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "B10" [get_ports "PS_SRSTB"]
set_property src_info {type:SCOPED_XDC file:1 line:361 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN "E7" [get_ports "PS_CLK"]
